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STR720 数据表(PDF) 13 Page - STMicroelectronics |
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STR720 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 401 page  STR720 - SYSTEM BLOCK DIAGRAM 13/401 3 SYSTEM BLOCK DIAGRAM The Figure 2: STR720 Block Diagram on page 13 gives an overview of the complete STR720 microcontroller, showing how ARM720T processor and their peripherals are interfaced. Figure 2. STR720 Block Diagram AHB VDD EFT1..2 RxD[2..1] TxD[2..1] ECLK1 TDI TDO TMS TCK TRST Test/Emu Port MISO[1..2] MOSI[1..2] ECS1n AN0 (P1.3-0) UART1..2 BSPI1..2 DATA RAM (4k x 32) Bridge A Master I/F AHB ASB Slave I/F ARM720 Core ROM (1k x 32) APB I/F EMI POWER SUPPLY Drawing not in scale AN1 AN2 AN3 DMA Ctrl AHB Master I/F APB Bridge Sync. Port4 DRAMC r b i t e r AHB CAN CAN RAM USB USB RAM APB Bridge ASync. OSCIN OSCOUT VDD3P Mid[0..31] Mia[0..13] MiCsN[0..3] RAS CAS MiWeN MiBls[0..3] Edata[0..15]/DD[0..15] Eadd[1..3]/DA[0..2] Eadd[4..21] Erdn/Diorn Ewr0n/Diown Ewr1n Ecs0n ICs0n ICs1n Iordy Irq CANRX CANTX SCK[1..2] VDD3 VDD3D VSSP VDDPLL VSSD VSSPLL VDDRTC VSS AVDD AGND MiClk MiClkEn ATAPI S-APB GPIO WDG EIC APB I/F RCCU GPIO APB I/F RTC APB I/F 32 kHz OSC ADC Port1 VDDRTC dedicated supply USBCK WIU APB I/F EXT_BOOT EINT0 EINT1 EINT2 EINT3 EINT4 GPIO APB I/F Port3 STOP_REQ Eready 1 |
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