STR720 datasheet(98/401 Pages) STMICROELECTRONICS

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STR720 - DMA CONTROLLER (DMAC)

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Last Flag Register (DMALast)

Address Offset: FCh

Reset value: 0000h

DMALast controls the activation of last buffer sweep mode for the streams configured in

circular buffer mode. See also Circular mode operations on page 84.

Bits 1:0 = Reserved. They must always be written to 0.

Bit 2 = LAST2: LAST buffer sweep stream 2

This bit is used to notify DMA that last circular buffer sweep started. If this bit is set while

stream 2 is configured in circular mode, the corresponding data stream interrupt flag will be

set when DMA uses the circular buffer location contained in DMALUBuff2 register.

0: Continuous circular buffer mode

1: Last circular buffer sweep started.

Bit 3 = LAST3: LAST buffer sweep stream 3

This bit is used to notify DMA that last circular buffer sweep started. If this bit is set while

stream 3 is configured in circular mode, the corresponding data stream interrupt flag will be

set when DMA uses the circular buffer location contained in DMALUBuff3 register.

0: Continuous circular buffer mode

1: Last circular buffer sweep started.

Bit 15:4 = Reserved. They must be always written to ‘0’

765432

Reserved

LAST3 LAST2

Res.

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