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HC705JB2GRS/H 数据表(PDF) 121 Page - NXP Semiconductors |
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HC705JB2GRS/H 数据表(HTML) 121 Page - NXP Semiconductors |
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121 / 128 page ![]() August 28, 1998 GENERAL RELEASE SPECIFICATION ELECTRICAL SPECIFICATIONS REV 1.1 13-3 NOTES: 1. All values shown reflect average measurements. 2. Typical values at midpoint of voltage range, 25 °C only. 3. Wait IDD: Only timer system (MFT) active. 4. Run (Operating) IDD, Wait IDD: Measured using external square wave clock source to OSC1 (fOSC = 6.0 MHz), all inputs 0.2 VDC from rail; no DC loads, less than 50pF on all outputs, CL = 20 pF on OSC2. 5. Wait, Stop IDD: All ports configured as inputs, VIL = 0.2 VDC, VIH = VDD-0.2 VDC. 6. Stop IDD measured with OSC1 = VSS. 7. Wait IDD is affected linearly by the OSC2 capacitance. 8. TA = 0°C to +40°C. 9. These are preliminary specifications. 13.4 USB DC ELECTRICAL CHARACTERISTICS Table 13-4. USB DC Electrical Characteristics (VDD = 4.2V to 5.5V, VSS = 0 Vdc, TA = 0°C to +70°C, unless otherwise noted) Characteristic Symbol Conditions Min Typ Max Unit Hi-Z State Data LIne Leakage ILO 0V<Vin<3.3V –10 +10 µA Differential Input Sensitivity VDI |(D+)–(D–)|, and Figure 12-1 0.2 V Differential Common Mode Range VCM Includes VDI range 0.8 2.5 V Single Ended Receiver Threshold VSE 0.8 2.0 V Static Output Low VOL RL of 1.5k to 3.6V 0.3 V Static Output High VOH RL of 15k to GND 2.8 3.6 V 3.3V External Reference Pin V3.3 IL=200µA 3.0 3.3 3.6 V Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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