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HC705JB2GRS/H 数据表(PDF) 126 Page - NXP Semiconductors |
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HC705JB2GRS/H 数据表(HTML) 126 Page - NXP Semiconductors |
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126 / 128 page  GENERAL RELEASE SPECIFICATION August 28, 1998 MECHANICAL SPECIFICATIONS MC68HC705JB2 14-2 REV 1.1 14.2 20-PIN SURFACE-MOUNT SMALL OUTLINE PACKAGE (SOIC) Figure 14-2. 20-Pin SOIC Mechanical Dimensions NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. –A– –B– 20 1 11 10 S A M 0.010 (0.25) B S T D 20X M B M 0.010 (0.25) P 10X J F G 18X K C –T– SEATING PLANE M R X 45 _ DIM MIN MAX MIN MAX INCHES MILLIMETERS A 12.65 12.95 0.499 0.510 B 7.40 7.60 0.292 0.299 C 2.35 2.65 0.093 0.104 D 0.35 0.49 0.014 0.019 F 0.50 0.90 0.020 0.035 G 1.27 BSC 0.050 BSC J 0.25 0.32 0.010 0.012 K 0.10 0.25 0.004 0.009 M 0 7 0 7 P 10.05 10.55 0.395 0.415 R 0.25 0.75 0.010 0.029 __ __ Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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