DSP56362P datasheet(147/152 Pages) FREESCALE

147 / 152 page

DSP56362 Technical Data, Rev. 4

Freescale Semiconductor

Index-1

Index

ac electrical characteristics 3

Address Trace mode 3, 38, 41

applications 5

arbitration bus timings 41

bootstrap ROM 3

Boundary Scan (JTAG Port) timing diagram 72

bus

address 2

data 2

multiplexed 2

non-multiplexed 2

bus acquisition timings 42

bus release timings 43, 44

clock

external 4

operation 5

clocks

internal 4

data memory expansion 4

DAX 4, 2, 16

dc electrical characteristics 2

Debug support 3

design considerations

electrical 3

PLL 4, 5

power consumption 3

thermal 1

Digital Audio Transmitter 4, 16

DRAM

out of page

read access 36

wait states selection guide 28

write access 37

out of page and refresh timings

11 wait states 32

15 wait states 33

4 wait states 28

8 wait states 30

Page mode

read accesses 27

wait states selection guide 19

write accesses 26

Page mode timings

1 wait state 19

2 wait states 21

3 wait states 22

4 wait states 24

refresh access 38

DRAM controller 4

DSP programming 6

electrical design considerations 3

Enhanced Serial Audio Interface 4

ESAI 4, 2

ESSI

receiver timing 66, 67

timings 62

transmitter timing 65

EXTAL jitter 5

external bus control 6, 7

external bus synchronous timings (SRAM access)

DSP56362P 数据表(PDF) 147 Page - Freescale Semiconductor, Inc

DSP56362P 数据表(HTML) 147 Page - Freescale Semiconductor, Inc

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