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H8SX1663 数据表(PDF) 159 Page - Renesas Technology Corp |
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H8SX1663 数据表(HTML) 159 Page - Renesas Technology Corp |
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159 / 1158 page ![]() Section 5 Interrupt Controller Rev.1.00 Jun. 07, 2006 Page 107 of 1102 REJ09B0294-0100 Bit Bit Name Initial Value R/W Description 11 10 9 8 7 6 5 4 3 2 1 0 IRQ11F IRQ10F IRQ9F IRQ8F IRQ7F IRQ6F IRQ5F IRQ4F IRQ3F IRQ2F IRQ1F IRQ0F 0 0 0 0 0 0 0 0 0 0 0 0 R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* [Setting condition] • When the interrupt selected by ISCR occurs [Clearing conditions] • Writing 0 after reading IRQnF = 1 (n = 11 to 0) • When interrupt exception handling is executed while low-level sensing is selected and IRQn input is high • When IRQn interrupt exception handling is executed while falling-, rising-, or both-edge sensing is selected • When the DTC is activated by an IRQn interrupt, and the DISEL bit in MRB of the DTC is cleared to 0 Note: * Only 0 can be written, to clear the flag. 5.3.7 Software Standby Release IRQ Enable Register (SSIER) SSIER selects the IRQ interrupt used to leave software standby mode. The IRQ interrupt used to leave software standby mode should not be set as the DTC activation source. Bit Bit Name Initial Value R/W 15 SSI15 0 R/W 14 0 R/W 13 0 R/W 12 0 R/W 11 SSI11 0 R/W 10 SSI10 0 R/W 9 SSI9 0 R/W 8 SSI8 0 R/W Bit Bit Name Initial Value R/W 7 SSI7 0 R/W 6 SSI6 0 R/W 5 SSI5 0 R/W 4 SSI4 0 R/W 3 SSI3 0 R/W 2 SSI2 0 R/W 1 SSI1 0 R/W 0 SSI0 0 R/W |
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