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H8SX1663 数据表(PDF) 266 Page - Renesas Technology Corp |
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H8SX1663 数据表(HTML) 266 Page - Renesas Technology Corp |
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266 / 1158 page ![]() Section 6 Bus Controller (BSC) Rev.1.00 Jun. 07, 2006 Page 214 of 1102 REJ09B0294-0100 6.8.3 I/O Pins Used for Burst ROM Interface Table 6.17 shows the pins used for the burst ROM interface. Table 6.17 I/O Pins Used for Burst ROM Interface Name Symbol I/O Function Bus cycle start BS Output Signal indicating that the bus cycle has started. Address strobe AS Output Strobe signal indicating that an address output on the address bus is valid during access Read strobe RD Output Strobe signal indicating the read access Read/write RD/ WR Output Signal indicating the data bus input or output direction Low-high write LHWR Output Strobe signal indicating that the upper byte (D15 to D8) is valid during write access Low-low write LLWR Output Strobe signal indicating that the lower byte (D7 to D0) is valid during write access Chip select 0 and 1 CS0, CS1 Output Strobe signal indicating that the area is selected Wait WAIT Input Wait request signal used when an external address space is accessed |
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