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ZUSBOPTSC01ZACG 数据表(PDF) 143 Page - Zilog, Inc. |
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ZUSBOPTSC01ZACG 数据表(HTML) 143 Page - Zilog, Inc. |
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143 / 282 page ![]() PS022827-1212 P R E L I M I N A R Y Operation Z8 Encore! XP® F082A Series Product Specification 126 The ADC registers actually return 13 bits of data, but the two LSBs are intended for com- pensation use only. When the software compensation routine is performed on the 13 bit raw ADC value, two bits of resolution are lost because of a rounding error. As a result, the final value is an 11-bit number. Hardware Overflow When the hardware overflow bit (OVF) is set in ADC Data Low Byte (ADCD_L) Regis- ter, all other data bits are invalid. The hardware overflow bit is set for values greater than VREF and less than –VREF (DIFFERENTIAL Mode). Automatic Powerdown If the ADC is idle (no conversions in progress) for 160 consecutive system clock cycles, portions of the ADC are automatically powered down. From this powerdown state, the ADC requires 40 system clock cycles to power up. The ADC powers up when a conver- sion is requested by the ADC Control Register. Single-Shot Conversion When configured for single-shot conversion, the ADC performs a single analog-to-digital conversion on the selected analog input channel. After completion of the conversion, the ADC shuts down. Observe the following steps for setting up the ADC and initiating a sin- gle-shot conversion: 1. Enable the appropriate analog inputs by configuring the general-purpose I/O pins for alternate analog function. This configuration disables the digital input and output drivers. 2. Write the ADC Control/Status Register 1 to configure the ADC. – Write to BUFMODE[2:0] to select SINGLE-ENDED or DIFFERENTIAL mode, plus unbuffered or buffered mode. – Write the REFSELH bit of the pair {REFSELH, REFSELL} to select the internal voltage reference level or to disable the internal reference. The REFSELL bit is. contained in the ADC Control Register 0. 3. Write to the ADC Control Register 0 to configure the ADC and begin the conversion. The bit fields in the ADC Control Register can be written simultaneously (the ADC can be configured and enabled with the same write instruction): – Write to the ANAIN[3:0] field to select from the available analog input sources (different input pins available depending on the device). – Clear CONT to 0 to select a single-shot conversion. |
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