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H8SX1663 数据表(PDF) 115 Page - Renesas Technology Corp

部件名 H8SX1663
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX1663 数据表(HTML) 115 Page - Renesas Technology Corp

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Section 2 CPU
Rev.1.00 Jun. 07, 2006 Page 63 of 1102
REJ09B0294-0100
Table 2.15
Effective Address Calculation for Branch Instructions
31
0
31
0
31
0
31
0
31
31
23
0
0
31
31
0
0
31
0
2 or 4
7
1
7
vec
op
disp
1
2
3
4
5
6
op
disp
op
r
op
aa
op
r
op
aa
aa
aa
op
aa
aa
31
0
31
0
op
vec
31
0
31
0
31
0
31
0
31
7
0
disp
31
0
31
0
31
15
0
disp
31
0
31
31
0
2
0
No.
Register indirect
Program-counter relative with 8-bit displacement
24-bit absolute address
32-bit absolute address
Zero
extension
Contents of general register (RL, R, or ER)
General register contents
Sign extension
Addressing Mode and Instruction Format
Effective Address Calculation
Effective Address (EA)
PC contents
Sign extension
PC contents
Zero extension
Zero extension
Memory contents
Memory contents
Zero extension
PC contents
Program-counter relative with 16-bit displacement
Program-counter relative with index register
Memory indirect
Extended memory indirect
+
×
+
×
+
2.8.13
MOVA Instruction
The MOVA instruction stores the effective address in a general register.
1. Firstly, data is obtained by the addressing mode shown in item 2 of table 2.14.
2. Next, the effective address is calculated using the obtained data as the index by the addressing
mode shown in item 5 of table 2.14. The obtained data is used instead of the general register.
The result is stored in a general register. For details, see H8SX Family Software Manual.



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