H8SX1663 datasheet(112/1158 Pages) RENESAS

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Section 2 CPU

Rev.1.00 Jun. 07, 2006 Page 60 of 1102

REJ09B0294-0100

2.8.10

Memory Indirect—@@aa:8

This mode can be used by the JMP and JSR instructions. The operand value is a branch address,

which is the contents of a memory location pointed to by an 8-bit absolute address in the

instruction code.

The upper bits of an 8-bit absolute address are all assumed to be 0, so the address range is 0 to 255

(H'0000 to H'00FF in normal mode, H'000000 to H'0000FF in other modes).

In normal mode, the memory location is pointed to by word-size data and the branch address is 16

bits long. In other modes, the memory location is pointed to by longword-size data. In middle or

advanced mode, the first byte of the longword-size data is assumed to be all 0 (H'00).

Note that the top part of the address range is also used as the exception handling vector area. A

vector address of an exception handling other than a reset or a CPU address error can be changed

by VBR.

Figure 2.15 shows an example of specification of a branch address using this addressing mode.

(a) Normal Mode

(b) Advanced Mode

Branch address

Specified

by @aa:8

Specified

by @aa:8

Reserved

Branch address

Figure 2.15 Branch Address Specification in Memory Indirect Mode

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