H8SX1663 datasheet(237/1158 Pages) RENESAS

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Section 6 Bus Controller (BSC)

Rev.1.00 Jun. 07, 2006 Page 185 of 1102

REJ09B0294-0100

(2) Area 1

n externally extended mode, all of area 1 is external address space. In on-chip ROM enabled

extended mode, the space excluding on-chip ROM is external address space.

When area 1 external address space is accessed, the

CS1 signal can be output.

Either of the basic bus interface, byte control SRAM, or burst ROM interface can be selected for

area 1 by bit BSRM1 in BROMCR and bit BCSEL1 in SRAMCR. Table 6.8 shows the external

interface of area 1.

Table 6.8

Area 1 External Interface

Interface

BSRM1 of BROMCR

BCSEL1 of SRAMCR

Basic bus interface

Byte control SRAM interface

Burst ROM interface

Setting prohibited

(3) Area 2

In externally extended mode, all of area 2 is external address space.

When area 2 external address space is accessed, the

CS2 signal can be output.

Either the basic bus interface, byte-control SRAM interface, DRAM interface, or SDRAM

interface can be selected for area 2 by the DRAME and DTYPE bits in DRAMCR and bit

BCSEL2 in SRAMCR. Table 6.9 shows the external interface of area 2.

Table 6.9

Area 2 External Interface

Interface

DRAME in

DRAMCR

DTYPE in

DRAMCR

BCSEL2 in

SRAMCR

Basic bus interface

Don't care

Byte-control SRAM interface

Don't care

DRAM interface

SDRAM interface

Setting prohibited

Don't care

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