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STR720 数据表(PDF) 108 Page - STMicroelectronics |
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STR720 数据表(HTML) 108 Page - STMicroelectronics |
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108 / 401 page ![]() STR720 - DRAM CONTROLLER (DRAMC) 108/401 Bank 2 SDRAM Configuration Register High (SDRAM2ConfigHi) Address Offset: 1Ch Reset value: 0000h The Bank 2 SDRAM Configuration Register High (SDRAM2ConfigHi) is a 16-bit write only control register used to configure the SDRAM device of external region 2 (Bank 2). The SDRAM2ConfigHi control bits are the same as SDRAM1ConfigHi register. Bank 3 SDRAM Configuration Register Low (SDRAM3ConfigLo) Address Offset: 20h Reset value: 0000h The Bank 3 SDRAM Configuration Register Low (SDRAM3ConfigLo) is a 16-bit write only control register used to configure the SDRAM device of external region 3 (Bank 3). The SDRAM3ConfigLo control bits are the same as SDRAM1ConfigLo register. Bank 3 SDRAM Configuration Register High (SDRAM3ConfigHi) Address Offset: 24h Reset value: 0000h The Bank 3 SDRAM Configuration Register High (SDRAM3ConfigHi) is a 16-bit write only control register used to configure the SDRAM device of external region 3 (Bank 3). The SDRAM3ConfigHi control bits are the same as SDRAM1ConfigHi register. 15 14 13 12 11 10 9 8 765432 1 0 reserved MIWE MIAA MISA wo wo wo 15 14 13 12 11 10 9 8 765432 1 0 reserved MIAB wo 15 14 13 12 11 10 9 8 765432 1 0 reserved MIWE MIAA MISA wo wo wo 1 |
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