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STR720 数据表(PDF) 178 Page - STMicroelectronics |
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STR720 数据表(HTML) 178 Page - STMicroelectronics |
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178 / 401 page ![]() STR720 - UART 178/401 ASCTxBuffer Address Offset: 04h Reset value: 0000h Writing to the transmit buffer register starts data transmission. Bit 15:9 = Reserved. Write 0 Bit 8 = TX[8]: Transmit buffer data D8. Transmit buffer data D8, or parity bit, or wake-up bit or undefined - dependent on the operating mode (the setting of the Mode field in ASCControl register). Note If the Mode field selects an 8 bit frame then this bit should be written as 0. Note If the Mode field selects a frame with parity bit, then the TX[8] bit will contain the parity bit (automatically generated by the UART). A user writing at ‘0’ or ‘1’ of such a bit will have no effect on the transmitted frame. Bit 7 = TX[7]: Transmit buffer data D7. Transmit buffer data D7 or parity bit - dependent on the operating mode (the setting of the Mode field in ASCControl register). Note If the Mode field selects a frame with parity bit, then the TX[7] bit will contain the parity bit (automatically generated by the UART). A user writing at ‘0’ or ‘1’ of such a bit will have no effect on the transmitted frame. Bit 6:0 = TX[6:0]: Transmit buffer data D(6:0) 15 14 13 12 11 10 9 8 765432 1 0 RESERVED TX[8] TX[7] TX[6] TX[5] TX[4] TX[3] TX[2] TX[1] TX[0] www www w w wwwwww w w 1 |
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