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STR720 数据表(PDF) 235 Page - STMicroelectronics |
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STR720 数据表(HTML) 235 Page - STMicroelectronics |
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235 / 401 page ![]() STR720 - CONTROLLER AREA NETWORK (CAN) 235/401 Interrupt Pending Registers 1 & 2 (CAN_IPnR) Address Offset: 140h (CAN_IP1R), 144h (CAN_IP2R) Reset Value: 0000 0000h These registers contain the IntPnd bits of the 32 Message Objects. By reading the IntPnd bits, the CPU can check for which Message Object an interrupt is pending. The IntPnd bit of a specific Message Object can be set/reset by the application software through the IFn Message Interface Registers or by the Message Handler after reception or after a successful transmission of a frame. This will also affect the value of IntId in the Interrupt Register. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 IntPnd[32:17] r 15 14 13 12 11 10 9 8765 4321 0 IntPnd[16:1] r Bits 31:16 IntPnd32-17 Interrupt Pending Bits (of all Message Objects) 0: This message object is not the source of an interrupt. 1: This message object is the source of an interrupt. Bits 15:0 IntPnd16-1 Interrupt Pending Bits (of all Message Objects) 0: This message object is not the source of an interrupt. 1: This message object is the source of an interrupt. 1 |
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