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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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STR720 数据表(PDF) 263 Page - STMicroelectronics |
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STR720 数据表(HTML) 263 Page - STMicroelectronics |
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263 / 401 page  STR720 - USB SLAVE INTERFACE (USB) 263/401 19 USB SLAVE INTERFACE (USB) 19.1 Introduction The USB Peripheral implements an interface between a full-speed USB 2.0 bus and the APB bus. USB suspend/resume are supported which allows to stop the device clocks for low power consumption. 19.2 Main Features • Configurable number of endpoints from 1 to 8. • Cyclic Redundancy Check (CRC) generation/checking, Non-Return-to-Zero Inverted (NRZI) encoding/decoding and bit-stuffing. • Isochronous transfers support. • Double-buffered bulk endpoint support. • USB Suspend/Resume operations. • Frame locked clock pulse generation. 19.3 Block Diagram Figure 40 shows the block diagram of the USB Peripheral. 1 |
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