STR720 datasheet(286/401 Pages) STMICROELECTRONICS

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STR720 - USB SLAVE INTERFACE (USB)

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Bit 9

SOF: Start Of Frame

This bit signals the beginning of a new USB frame and it is set when a SOF

packet arrives through the USB bus. The interrupt service routine may monitor

the SOF events to have a 1mS synchronization event to the USB host and to

safely read the USB_FNR register which is updated at the SOF packet

reception (this could be useful for isochronous applications). This bit is read/

write but only ‘0’ can be written and writing ‘1’ has no effect.

Bit 8

ESOF: Expected Start Of Frame

This bit is set by the hardware when an SOF packet is expected but not

received. The host sends an SOF packet each mS, but if the hub does not

receive it properly, the Suspend Timer issues this interrupt. If three consecutive

ESOF interrupts are generated (i.e. three SOF packets are lost) without any

traffic occurring in between, a SUSP interrupt is generated. This bit is set even

when the missing SOF packets occur while the Suspend Timer is not yet locked.

This bit is read/write but only ‘0’ can be written and writing ‘1’ has no effect.

Bits 7:5

Reserved.

These are reserved bits. These bits are always read as ‘0’ and must always be

written with ‘0’.

Bit 4

DIR: Direction of transaction.

This bit is written by the hardware according to the direction of the successful

transaction, which generated the interrupt request.

If DIR bit=0, CTR_TX bit is set in the USB_EPnR register related to the

interrupting endpoint. The interrupting transaction is of IN type (data transmitted

by the USB Peripheral to the host PC).

If DIR bit=1, CTR_RX bit or both CTR_TX/CTR_RX are set in the USB_EPnR

OUT type (data received by the USB Peripheral from the host PC) or two

pending transactions are waiting to be processed.

This information can be used by the application software to access the

USB_EPnR bits related to the triggering transaction since it represents the

direction having the interrupt pending. This bit is read-only.

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