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STR720 数据表(PDF) 300 Page - STMicroelectronics |
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STR720 数据表(HTML) 300 Page - STMicroelectronics |
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300 / 401 page ![]() STR720 - USB SLAVE INTERFACE (USB) 300/401 Reception Byte Count n (USB_COUNTn_RX) This table location is used to store two different values, both required during packet reception. The most significant bits contains the definition of allocated buffer size, to allow buffer overflow detection, while the least significant part of this location is written back by the USB Peripheral at the end of reception to give the actual number of received bytes. Due to the restrictions on the number of available bits, buffer size is represented using the number of allocated memory blocks, where block size can be selected to choose the trade-off between fine-granularity/ small-buffer and coarse-granularity/large-buffer. The size of allocated buffer is a part of the endpoint descriptor and it is normally defined during the enumeration process according to its maxPacketSize parameter value (See “Universal Serial Bus Specification”). Address Offset: [USB_BTABLE] + n*16 + 12 USB local Address: [USB_BTABLE] + n*8 + 6 15 14 13 12 11 10 987654321 0 NUM_BLOCK[4:0] COUNTn_RX[9:0] rw rw r Bit 15 BL_SIZE: BLock SIZE. This bit selects the size of memory block used to define the allocated buffer area. • If BL_SIZE=0, the memory block is 2 byte large, which is the minimum block allowed in a word-wide memory. With this block size the allocated buffer size ranges from 2 to 62 bytes. • If BL_SIZE=1, the memory block is 32 byte large, which allows to reach the maximum packet length defined by USB specifications. With this block size the allocated buffer size ranges from 32 to 1024 bytes, which is the longest packet size allowed by USB standard specifications. Bits 14:10 NUM_BLOCK[4:0]: Number of blocks. These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BL_SIZE value as illustrated in Table 66. Bits 9:0 COUNTn_RX[9:0]. These bits contain the number of bytes received by the endpoint associated with the USB_EPnR register during the last OUT/ SETUP transaction addressed to it. 1 |
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