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DRA821U4...ALM 数据表(PDF) 141 Page - Texas Instruments |
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DRA821U4...ALM 数据表(HTML) 141 Page - Texas Instruments |
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141 / 252 page ![]() OSC1_XO Device OSC1_XI J7VC_LF_OSC_INT_12 PCB Ground Figure 7-33. 1.8-V LVCMOS-Compatible Clock Input 7.9.4.1.5 Auxiliary OSC1 Not Used Figure 7-34 shows the recommended oscillator connections when OSC1 is not used. OSC1_XI must be connected to VSS through an external pull resistor (Rpd) to ensure this input is held to a valid low level when unused since the internal pull-down resistor is disabled by default. Device OSC1_XO OSC1_XI J7ES_AUX_OSC_NOT_USED_11 Rpd PCB Ground NC Figure 7-34. OSC1 Not Used 7.9.4.1.6 WKUP_LF_CLKIN Internal Oscillator Clock Source Figure 7-35 shows the recommended oscillator connections when WKUP_LF_CLKIN is connected to an LVCMOS square-wave digital clock source. www.ti.com DRA821U-Q1 SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 141 Product Folder Links: DRA821U-Q1 |
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