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H8SX1663 数据表(PDF) 179 Page - Renesas Technology Corp

部件名 H8SX1663
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX1663 数据表(HTML) 179 Page - Renesas Technology Corp

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Section 5 Interrupt Controller
Rev.1.00 Jun. 07, 2006 Page 127 of 1102
REJ09B0294-0100
Table 5.8 shows a setting example of the priority control function over the DTC and DMAC and
the transfer request control state. A priority level can be independently set to each DMAC channel,
but the table only shows one channel for example. Transfers through the DMAC channels can be
separately controlled by assigning different priority levels for channels.
Table 5.8
Example of Priority Control Function Setting and Control State
Transfer Request Control State
Interrupt Control
Mode
CPUPCE in
CPUPCR
CPUP2 to
CPUP0
DTCP2 to
DTCP0
DMAP2 to
DMAP0
DTC
DMAC
0
0
Any
Any
Any
Enabled
Enabled
1
B'000
B'000
B'000
Enabled
Enabled
B'100
B'000
B'000
Masked
Masked
B'100
B'000
B'011
Masked
Masked
B'100
B'111
B'101
Enabled
Enabled
B'000
B'111
B'101
Enabled
Enabled
2
0
Any
Any
Any
Enabled
Enabled
1
B'000
B'000
B'000
Enabled
Enabled
B'000
B'011
B'101
Enabled
Enabled
B'011
B'011
B'101
Enabled
Enabled
B'100
B'011
B'101
Masked
Enabled
B'101
B'011
B'101
Masked
Enabled
B'110
B'011
B'101
Masked
Masked
B'111
B'011
B'101
Masked
Masked
B'101
B'011
B'101
Masked
Enabled
B'101
B'110
B'101
Enabled
Enabled



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