ZUSBOPTSC01ZACG datasheet(154/282 Pages) ZILOG

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PS022827-1212

P R E L I M I N A R Y

ADC Control Register Definitions

Z8 Encore! XP® F082A Series

Product Specification

137

ADC Data Low Byte Register

The ADC Data Low Byte (ADCD_L) Register contains the lower bits of the ADC output

plus an overflow status bit. The output is a 13-bit two’s complement value. During a sin-

gle-shot conversion, this value is invalid. Access to the ADC Data Low Byte Register is

read-only. Reading the ADC Data High Byte Register latches data in the ADC Low Bits

Table 75. ADC Data High Byte Register (ADCD_H)

Bit

Field

ADCDH

RESET

XXX

R/W

RRR

Address

F72H

X = Undefined.

Bit

Description

[7:0]



ADCDH

ADC Data High Byte

This byte contains the upper eight bits of the ADC output. These bits are not valid during a sin-

gle-shot conversion. During a continuous conversion, the most recent conversion output is

held in this register. These bits are undefined after a Reset.

Table 76. ADC Data Low Byte Register (ADCD_L)

Bit

Field

ADCDL

Reserved

OVF

RESET

XXX

R/W

RRR

Address

F73H

X = Undefined.

Bit

Description

[7:3]



ADCDL

ADC Data Low Bits

These bits are the least significant five bits of the 13-bits of the ADC output. These bits are

undefined after a Reset.

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