STR720 datasheet(122/401 Pages) STMICROELECTRONICS

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STR720 - EXTERNAL MEMORY INTERFACE (EMI)

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Bank 1 Configuration Register (BCON1)

Address Offset: 04h

Reset value: 0001h

Note

According to I/O configuration, memory bank 1 could not be accessible. In that case

this register must be considered reserved and it must be always written to 0001h.

The Bank 1 Configuration Register (BCON1) is a 16-bit read/write control registers used to

configure the operation of external region 1 (Bank 1). The BCON1 control bits are described

below:

Bit 15

Reserved. This bit must be always written to ‘0’.

Bit 14:8

B_LENGTH[6:0]: Bank 1 Length.

The B_LENGTH field selects the extension of the address region 1 in 64 Kbyte

increments. The following figures are expressed in bytes.

= 0x00. 64k

= 0x01. 128k

= 0x02. 192k

= 0x03. 256k

...

= 0x7F. 8192k (8M)

Bit 7

EREN: External Ready Enable.

This bit selects whether read/write cycle termination is controlled by the “Eready”

input signal.

= 0. Read/Write cycle termination is not controlled by “Eready” signal.

= 1. Read/Write cycle termination is controlled by “Eready” signal.

Bit 6

ISYN1: Internal Synchronization Bank 1.

This bit selects whether the Eready signals, if used, has to be internally

synchronized or not.

= 0. No internal synchronization. It provides the fastest bus cycles but requires

setup and hold times to be met with respect to the EMI internal clock.

= 1. Internal synchronization. Less restrictive, but requires additional wait states

caused by the internal synchronization.

Bit 5

BE: Bank 1 Enable.

BE bit enables Bank 1 of memory.

= 1. Bank enabled.

= 0. Bank disabled.

765432

Res.

B_LENGTH[6:0]

EREN

ISYN1

C_LENGTH[2:0]

Res.

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