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STR720 数据表(PDF) 185 Page - STMicroelectronics |
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STR720 数据表(HTML) 185 Page - STMicroelectronics |
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185 / 401 page ![]() STR720 - UART 185/401 16.4.1 Register map The following table summarizes the registers implemented in the UART macrocell. Refer to Table 20 on page 49 for the base address. Table 45. UART Peripheral Register Map Addr. Offset Register Name 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 ASC Baud Rate ASCBaudRate 4 ASC TxBuffer RESERVED ASCTxBuffer 8 ASC RxBuffer RESERVED ASCRxBuffer C ASC Control RESERVED FifoEn- able RE- SERVE D RxEn- able Run Loop- Back Parity- Odd Stop Bits Mode 10 ASC IntEnable RESERVED ASCIntEnable 14 ASC Status RESERVED ASCStatus 1C ASC Timeout RESERVED ASCTimeout 20 ASC TxReset ASCTxReset 24 ASC RxReset ASCRxReset 1 |
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