STR720 datasheet(205/401 Pages) STMICROELECTRONICS

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STR720 - CONTROLLER AREA NETWORK (CAN)

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transmission. If several transmit messages are assigned to the same Message Object (when

the number of Message Objects is not sufficient), the whole Message Object has to be

configured before the transmission of this message is requested.

The transmission of any number of Message Objects may be requested at the same time.

Message objects are transmitted subsequently according to their internal priority. Messages

may be updated or set to not valid any time, even when their requested transmission is still

pending. The old data will be discarded when a message is updated before its pending

transmission has started.

Depending on the configuration of the Message Object, the transmission of a message may

be requested autonomously by the reception of a remote frame with a matching identifier.

18.4.3

Disabled Automatic Re-Transmission Mode

In accordance with the CAN Specification (see ISO11898, 6.3.3 Recovery Management), the

CAN Peripheral provides means for automatic re-transmission of frames that have lost

arbitration or have been disturbed by errors during transmission. The frame transmission

service will not be confirmed to the user before the transmission is successfully completed.

This means that, by default, automatic retransmission is enabled. It can be disabled to enable

the CAN Peripheral to work within a Time Triggered CAN (TTCAN, see ISO11898-1)

environment.

Disabled Automatic Retransmission mode is enabled by setting the Disable Automatic

Retransmission (DAR) bit in the CAN Control Register. In this operation mode, the

programmer has to consider the different behaviour of bits TxRqst and NewDat in the Control

Registers of the Message Buffers:

•

When a transmission starts, bit TxRqst of the respective Message Buffer is cleared, while

bit NewDat remains set.

•

When the transmission completed successfully, bit NewDat is cleared.

•

When a transmission fails (lost arbitration or error), bit NewDat remains set.

To restart the transmission, the CPU should set the bit TxRqst again.

18.4.4

Test Mode

Test Mode is entered by setting the Test bit in the CAN Control Register. In Test Mode, bits

Tx1, Tx0, LBack, Silent and Basic in the Test Register are writeable. Bit Rx monitors the state

of the CAN_RX pin and therefore is only readable. All Test Register functions are disabled

when the Test bit is cleared.

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