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STR720 数据表(PDF) 249 Page - STMicroelectronics

部件名 STR720
功能描述  ARM720T 16/32-BIT MCU WITH 16K RAM, USB, CAN, 3 TIMERS, ADC, 6 COMMUNICATIONS INTERFACES
PDF  401 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STR720 数据表(HTML) 249 Page - STMicroelectronics

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STR720 - CONTROLLER AREA NETWORK (CAN)
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18.7.10 Configuring the Bit Timing
Even if minor errors in the configuration of the CAN bit timing do not result in immediate
failure, the performance of a CAN network can be reduced significantly.
In many cases, the CAN bit synchronization will amend a faulty configuration of the CAN bit
timing to such a degree that only occasionally an error frame is generated. However, in the
case of arbitration, when two or more CAN nodes simultaneously try to transmit a frame, a
misplaced sample point may cause one of the transmitters to become error passive.
The analysis of such sporadic errors requires a detailed knowledge of the CAN bit
synchronization inside a CAN node and interaction of the CAN nodes on the CAN bus.
18.7.10.1 Bit Time and Bit Rate
CAN supports bit rates in the range of lower than 1 kBit/s up to 1000 kBit/s. Each member of
the CAN network has its own clock generator, usually a quartz oscillator. The timing
parameter of the bit time (i.e. the reciprocal of the bit rate) can be configured individually for
each CAN node, creating a common bit rate even though the oscillator periods of the CAN
nodes (fosc) may be different.
The frequencies of these oscillators are not absolutely stable, small variations are caused by
changes in temperature or voltage and by deteriorating components. As long as the variations
remain inside a specific oscillator tolerance range (df), the CAN nodes are able to
compensate for the different bit rates by re-synchronizing to the bit stream.
According to the CAN specification, the bit time is divided into four segments (see Figure 35).
The Synchronization Segment, the Propagation Time Segment, the Phase Buffer Segment 1
and the Phase Buffer Segment 2. Each segment consists of a specific, programmable number
of time quanta (see Table 56). The length of the time quantum (tq), which is the basic time unit
of the bit time, is defined by the CAN controller’s system clock fAPB and the BRP bit of the Bit
Timing Register (CAN_BTR): tq = BRP / fAPB.
The Synchronization Segment, Sync_Seg, is that part of the bit time where edges of the CAN
bus level are expected to occur. The distance between an edge, that occurs outside of
Sync_Seg, and the Sync_Seg is called the phase error of that edge. The Propagation Time
Segment, Prop_Seg, is intended to compensate for the physical delay times within the CAN
network. The Phase Buffer Segments Phase_Seg1 and Phase_Seg2 surround the Sample
Point. The (Re-)Synchronization Jump Width (SJW) defines how far a re-synchronization may
move the Sample Point inside the limits defined by the Phase Buffer Segments to compensate
for edge phase errors.
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