STR720 datasheet(293/401 Pages) STMICROELECTRONICS

293 / 401 page

STR720 - USB SLAVE INTERFACE (USB)

293/401

Bits

13:12

STAT_RX [1:0] Status bits, for reception transfers

These bits contain information about the endpoint status, which are listed in

Table 62, “Reception Status Encoding,” on page 296.These bits can be

toggled by software to initialize their value. When the application software

writes ‘0’, the value remains unchanged, while writing ‘1’ makes the bit value

toggle. Hardware sets the STAT_RX bits to NAK when a correct transfer has

occurred (CTR_RX=1) corresponding to a OUT or SETUP (control only)

transaction addressed to this endpoint, so the software has the time to

elaborate the received data before it acknowledge a new transaction

Double-buffered bulk endpoints implement a special transaction flow control,

which control the status based upon buffer availability condition (Refer to

Section “Double-Buffered Endpoints”).

If the endpoint is defined as Isochronous, its status can be only “VALID” or

“DISABLED”, so that the hardware cannot change the status of the endpoint

after a successful transaction. If the software sets the STAT_RX bits to ‘STALL’

or ‘NAK’ for an Isochronous endpoint, the USB Peripheral behaviour is not

defined. These bits are read/write but they can be only toggled by writing ‘1’.

Bit 11

SETUP: Setup transaction completed

This bit is read-only and it is set by the hardware when the last completed

transaction is a SETUP. This bit changes its value only for control endpoints. It

must be examined, in the case of a successful receive transaction (CTR_RX

event), to determine the type of transaction occurred. To protect the interrupt

service routine from the changes in SETUP bits due to next incoming tokens,

this bit is kept frozen while CTR_RX bit is at 1; its state changes when

CTR_RX is at 0. This bit is read-only.

Bits 10:9

EP_TYPE[1:0]: Endpoint type

These bits configure the behaviour of this endpoint as described in Table 63,

“Endpoint Type Encoding,” on page 296. Endpoint 0 must always be a control

endpoint and each USB function must have at least one control endpoint

which has address 0, but there may be other control endpoints if required.

Only control endpoints handle SETUP transactions, which are ignored by

endpoints of other kinds. SETUP transactions cannot be answered with NAK

or STALL. If a control endpoint is defined as NAK, the USB Peripheral will not

answer, simulating a receive error, in the receive direction when a SETUP

transaction is received. If the control endpoint is defined as STALL in the

receive direction, then the SETUP packet will be accepted anyway,

transferring data and issuing the CTR interrupt. The reception of OUT

transactions is handled in the normal way, even if the endpoint is a control

one.

Bulk and interrupt endpoints have very similar behaviour and they differ only in

the special feature available using the EP_KIND configuration bit.

The usage of Isochronous endpoints is explained in “Isochronous Transfers”

STR720 数据表(PDF) 293 Page - STMicroelectronics

STR720 数据表(HTML) 293 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载