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STR720 数据表(PDF) 294 Page - STMicroelectronics

部件名 STR720
功能描述  ARM720T 16/32-BIT MCU WITH 16K RAM, USB, CAN, 3 TIMERS, ADC, 6 COMMUNICATIONS INTERFACES
PDF  401 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STR720 数据表(HTML) 294 Page - STMicroelectronics

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STR720 - USB SLAVE INTERFACE (USB)
294/401
Bit 8
EP_KIND: Endpoint Kind
The meaning of this bit depends on the endpoint type configured by the
EP_TYPE bits. Table 64 summarizes the different meanings.
DBL_BUF: This bit is set by the software to enable the double-buffering
feature for this bulk endpoint. The usage of double-buffered bulk endpoints is
explained in “Double-Buffered Endpoints”.
STATUS_OUT: This bit is set by the software to indicate that a status out
transaction is expected: in this case all OUT transactions containing more
than zero data bytes are answered ‘STALL’ instead of ‘ACK’. This bit may be
used to improve the robustness of the application to protocol errors during
control transfers and its usage is intended for control endpoints only. When
STATUS_OUT is reset, OUT transactions can have any number of bytes, as
required.
Bit 7
CTR_TX: Correct Transfer for transmission
This bit is set by the hardware when an IN transaction is successfully
completed on this endpoint; the software can only clear this bit. If the CTRM
bit in the USB_CNTR register is set accordingly, a generic interrupt condition
is generated together with the endpoint related interrupt condition, which is
always activated.
Note
A transaction ended with a NAK or STALL handshake does not set
this bit, since no data is actually transferred, as in the case of
protocol errors or data toggle mismatches.
This bit is read/write but only ‘0’ can be written.
1



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