STR720 datasheet(359/401 Pages) STMICROELECTRONICS

359 / 401 page

STR720 - MISCELLANEA REGISTERS (GCR - CGC - AHB_ERR)

359/401

CGC Emulation register 2 (CGC-EMU2)

Address: 0xF000_2C14

Reset value: 0x001F

This register configures the status of clock gating for each of the peripheral kernel requiring a

dedicated clock, while the application program execution is stopped due to a debug request.

Each peripheral can be configured to stop working as the user code reaches a breakpoint.

Bits 15:3 = Reserved. These bits must be always written to 0.

Bits 2:1 = DxEM: Dedicated peripheral x clock during EMulation

0: Peripheral x dedicated clock is gated off at a debug request, regardless from the state of

the corresponding DxCO bit.

1: Peripheral x dedicated clock gating status is unaffected by debug requests, and it is always

determined by its corresponding DxCO bit.

Bit 0 = Reserved. This bit must be always written to 0.

The following table lists the correspondence between each controllable peripheral and the

CGC-EMU2 register bits along with their reset value..

765432

Reserved

D2EM

D1EM

Res.

-rw

Table 79. CGC-EMU2 bit assignment

CGC-EMU2

Bit

Affected

peripheral

Reset

status

D1EM

ATAPI-Kernel

Not affected by debug requests.

D2EM

USB-Kernel

Not affected by debug requests.

STR720 数据表(PDF) 359 Page - STMicroelectronics

STR720 数据表(HTML) 359 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载