H5GQ2H24AFR-R0C datasheet(32/172 Pages) HYNIX

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This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

responsability for use of circuits described. No patent licenses are implied.

Rev. 1.2 /Nov. 2011

H5GQ2H24AFR

3.4. READ TRAINING

Read training allows the memory controller to find the data‐eye center (symbol training) and burst frame

location (frame training) for each high‐speed output of the GDDR5 SGRAM. Each pin (DQ0‐DQ31, DBI0#‐

DBI3#, EDC0‐EDC3) can be individually trained during this sequence.

For Read Training the following conditions must be true:

•at least one bank is active, or an auto refresh must be in progress and bit A2 in Mode Register 5 (MR5) is set to 0 to

allow training during auto refresh (to disable this special REF enabling of the WCK clock tree an ACT command

must be issued, or the device must be set into power‐down or self refresh mode)

•WCK2CK training must be complete

•the PLL must be locked, if enabled

•RDBI and WDBI must be enabled prior to and during Read Training if the training shall include the DBI# pins.

RDCRC and WRCRC must be enabled prior to and during Read Training if the training shall include the EDC

pins.

The following commands are associated with Read Training:

•LDFF to preload the Read FIFO;

•RDTR to read a burst of data directly out of the Read FIFO.

Neither LDFF nor RDTR access the memory core. No MRS is required to enter Read Training.

Figure 16 shows an example of the internal data paths used with LDFF and RDTR. Table 13 lists AC timing

parameters associated with Read Training.

Table 13 LDFF and RDTR TIMINGS

PARAMETER

SYMBOL

VALUES

UNIT NOTES

MIN

MAX

ACTIVE to LDFF command delay

tRCDLTR

–

ACTIVE to RDTR command delay

tRCDRTR

–

REFRESH to RDTR or WRTR command delay

tREFTR

–

RDTR to RDTR command delay

tCCDS

2–

tCK

LDFF to LDFF command cycle time

tLTLTR

4–

tCK

LDFF(111) to LDFF command cycle time

tLTL7TR

4–

tCK

The min. value does not exceed 8 tCK.

LDFF(111) to RDTR command delay

tLTRTR

4–

tCK

READ or RDTR to LDFF command delay

tRDTLT

4–

tCK

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