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H5GQ2H24AFR-R0C 数据表(PDF) 49 Page - Hynix Semiconductor |
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H5GQ2H24AFR-R0C 数据表(HTML) 49 Page - Hynix Semiconductor |
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49 / 172 page  This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsability for use of circuits described. No patent licenses are implied. Rev. 1.2 /Nov. 2011 49 H5GQ2H24AFR will be increased. With positive offset steps the drive strengths will be increased and Ron will be decreased. With negative offset steps the termin‐ation value will be increased. With positive offset steps the termination value will be decreased. IV curves and AC timings are only guaranteed with zero offset. Figure 26. Impedance Offsets Calibration Engine 120 Ohms VSSQ ZQ Pullup Impedance Pulldown Impedance Offset PU Driver Offset PD Driver ADD/CMD Termination Impedance Offset ADD/CMD Termination DQ/DBI#/WCK Termination Impedance Offset DQ/DBI#/WCK Termination Autocalibrated Impedance Note: sum of offset + auto‐ calibrated impedance cannot exceed maximum / minimum available impedance steps Fixed Impedance nominal (60/40) Auto/Fixed |
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