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DRV8461SPWPR 数据表(PDF) 37 Page - Texas Instruments |
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DRV8461SPWPR 数据表(HTML) 37 Page - Texas Instruments |
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37 / 117 page  Indexer PI Controller (KP, KI, KP_DIV_SEL, KI_DIV_SEL) M Stepper Driver Current Sense Coil Current Ramp Generator FPWM Figure 7-17. Silent step block diagram Table 7-22 shows the SPI register parameters related to the silent step decay mode. Table 7-22. Silent step Parameter Table Parameter Description EN_SS When EN_SS is 1b, silent step decay mode is enabled. Device starts operating with silent step after one zero cross each for currents in coil A and coil B. Writing 0b to EN_SS disables silent step decay mode, and the decay mode changes as per DECAY bit setting. SS_PWM_FREQ[1:0] Represents the PWM frequency (FPWM) in silent step decay mode. • 00b = 25 kHz (default) • 01b = 33 kHz • 10b = 42 kHz • 11b = 50 kHz Higher PWM frequency results in more switching loss. SS_SMPL_SEL[1:0] Silent step current zero cross sampling time. Default value is 2 μs. If current waveform is distorted around zero crossing, increase the sampling time. • 00b = 2 μs (default) • 01b = 3 μs • 10b = 4 μs • 11b = 5 μs SS_KP[6:0] Represents the proportional gain of the silent step PI controller. Has a range of 0 to 127, with a default value of 0. SS_KI[6:0] Represents the integral gain of the silent step PI controller. Has a range of 0 to 127, with a default value of 0. SS_KP_DIV_SEL[2:0] Divider factor for KP. Actual KP = SS_KP / SS_KP_DIV_SEL. • 000b - SS_KP/32 (default) • 001b - SS_KP/64 • 010b - SS_KP/128 • 011b - SS_KP/256 • 100b - SS_KP/512 • 101b - SS_KP/16 • 110b - SS_KP SS_KI_DIV_SEL[2:0] Divider factor for KI. Actual KI = SS_KI / SS_KI_DIV_SEL. • 000b - SS_KI/32 (default) • 001b - SS_KI/64 • 010b - SS_KI/128 • 011b - SS_KI/256 • 100b - SS_KI/512 • 101b - SS_KI/16 • 110b - SS_KI www.ti.com DRV8461 SLOSE98 – DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 37 Product Folder Links: DRV8461 |
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