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DRV8461SPWPR 数据表(PDF) 98 Page - Texas Instruments |
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DRV8461SPWPR 数据表(HTML) 98 Page - Texas Instruments |
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98 / 117 page ![]() Table 7-93. SS_CTRL3 Register Field Descriptions Bit Field Type Default Description 7 RSVD R/W 0b Reserved. 6-0 SS_KI[6:0] R/W 0000000b Represents the integral gain of the silent step PI controller. Has a range of 0 to 127, with a default value of 0. 7.5.6.4 SS_CTRL4 (address = 0x34) [Default = 00h] SS_CTRL4 is shown in Figure 7-109 and described in Table 7-94. Read/Write Return to the Register Maps Table Figure 7-109. SS_CTRL4 Register 7 6 5 4 3 2 1 0 RSVD SS_KI_DIV_SEL[2:0] RSVD SS_KP_DIV_SEL[2:0] R/W-0b R/W-000b R/W-0b R/W-000b Table 7-94. SS_CTRL4 Register Field Descriptions Bit Field Type Default Description 7 RSVD R/W 0b Reserved 6-4 SS_KI_DIV_SEL[2:0] R/W 000b Divider factor for KI. Actual KI = SS_KI / SS_KI_DIV_SEL • 000b - SS_KI/32 • 001b - SS_KI/64 • 010b - SS_KI/128 • 011b - SS_KI/256 • 100b - SS_KI/512 • 101b - SS_KI/16 • 110b - SS_KI 3-1 RSVD R/W 0b Reserved 0 SS_KP_DIV_SEL[2:0] R/W 000b Divider factor for KP. Actual KP = SS_KP / SS_KP_DIV_SEL. • 000b - SS_KP/32 • 001b - SS_KP/64 • 010b - SS_KP/128 • 011b - SS_KP/256 • 100b - SS_KP/512 • 101b - SS_KP/16 • 110b - SS_KP 7.5.6.5 SS_CTRL5 (address = 0x35) [Default = FFh] SS_CTRL5 is shown in Figure 7-110 and described in Table 7-95. Read/Write Return to the Register Maps Table Figure 7-110. SS_CTRL5 Register 7 6 5 4 3 2 1 0 SS_THR[7:0] R/W-11111111b DRV8461 SLOSE98 – DECEMBER 2022 www.ti.com 98 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DRV8461 |
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