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DRV8461SPWPR 数据表(PDF) 73 Page - Texas Instruments |
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DRV8461SPWPR 数据表(HTML) 73 Page - Texas Instruments |
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73 / 117 page ![]() Table 7-34. Access Type Codes (continued) Access Type Code Description W W Write Reset or Default Value -n Value after reset or the default value 7.5.1 Status Registers The status registers are used to reporting warning and fault conditions. Status registers are read-only registers. Table 7-35 lists the memory-mapped registers for the status registers. All register offset addresses not listed in Table 7-35 should be considered as reserved locations and the register contents should not be modified. Table 7-35. Status Registers Summary Table Address Register Name Section 0x00 FAULT Go 0x01 DIAG1 Go 0x02 DIAG2 Go 0x03 DIAG3 Go 7.5.1.1 FAULT (address = 0x00) [Default = 00h] FAULT status is shown in Figure 7-56 and described in Table 7-36. Read-only Return to the Register Maps Table Figure 7-56. FAULT Register 7 6 5 4 3 2 1 0 FAULT SPI_ERROR UVLO CPUV OCP STL TF OL R-0b R-0b R-0b R-0b R-0b R-0b R-0b R-0b Table 7-36. FAULT Register Field Descriptions Bit Field Type Default Description 7 FAULT R 0b FAULT bit is 1b when device has any fault condition. During normal operation, FAULT bit is 0b. nFAULT pin is pulled down when FAULT bit is 1b. nFAULT pin is released during normal operation. 6 SPI_ERROR R 0b Indicates SPI protocol errors, such as more SCLK pulses than are required or SCLK is absent even though nSCS is low. SPI_ERROR becomes 1b in fault and the nFAULT pin is driven low. Normal operation resumes when the protocol error is removed and a clear faults command has been issued either through the CLR_FLT bit or an nSLEEP reset pulse. 5 UVLO R 0b When this bit is 1b, it indicates an supply undervoltage lockout fault condition. 4 CPUV R 0b When this bit is 1b, it indicates charge pump undervoltage fault condition. 3 OCP R 0b When this bit is 1b, it indicates overcurrent fault condition 2 STL R 0b When this bit is 1b, it indicates motor stall condition. 1 TF R 0b Logic OR of the overtemperature warning (OTW) and overtemperature shutdown (OTSD). When this bit is 1b, it indicates overtemperature fault. 0 OL R 0b When this bit is 1b, it indicates open-load fault condition. www.ti.com DRV8461 SLOSE98 – DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 73 Product Folder Links: DRV8461 |
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