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DRV8461SPWPR 数据表(PDF) 79 Page - Texas Instruments |
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DRV8461SPWPR 数据表(HTML) 79 Page - Texas Instruments |
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79 / 117 page  Figure 7-64. CTRL5 Control Register (continued) STALL_TH [7:0] R/W-00000011b Table 7-45. CTRL5 Control Register Field Descriptions Bit Field Type Default Description 7-0 STALL_TH [7:0] R/W 00000011b Lower 8-bits of stall threshold. • 000000000000b = 0 count • ..................................................... • 000000000011b = 3 counts (default) • ..................................................... • 111111111111b = 4095 counts 7.5.2.6 CTRL6 (address = 0x09) [Default = 20h] CTRL6 is shown in Figure 7-65 and described in Table 7-46. Read/Write Return to the Register Maps Table Figure 7-65. CTRL6 Control Register 7 6 5 4 3 2 1 0 RC_RIPPLE[1:0] DIS_SSC TRQ_SCALE STALL_TH[11:8] R/W-00b R/W-1b R/W-0b R/W-0000b Table 7-46. CTRL6 Control Register Field Descriptions Bit Field Type Default Description 7-6 RC_RIPPLE[1:0] R/W 00b Controls the current ripple in smart tune ripple control decay mode. • 00b = 1% ripple (default) • 01b = 2% ripple • 10b = 4% ripple • 11b = 6% ripple 5 DIS_SSC R/W 1b 0b = spread-spectrum enabled 1b = spread-spectrum disabled 4 TRQ_SCALE R/W 0b 0b = No torque count scaling is applied 1b = Torque count is scaled up by a factor of 8 3-0 STALL_TH[11:8] R/W 0000b 4 MSB bits of stall threshold. 7.5.2.7 CTRL7 (address = 0x0A) [Default = FFh] CTRL7 is shown in Figure 7-66 and described in Table 7-47. Read-only Return to the Register Maps Table Figure 7-66. CTRL7 Control Register 7 6 5 4 3 2 1 0 TRQ_COUNT[7:0] R-11111111b www.ti.com DRV8461 SLOSE98 – DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 79 Product Folder Links: DRV8461 |
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