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DRV8461SPWPR 数据表(PDF) 74 Page - Texas Instruments |
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DRV8461SPWPR 数据表(HTML) 74 Page - Texas Instruments |
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74 / 117 page  7.5.1.2 DIAG1 (address = 0x01) [Default = 00h] DIAG1 is shown in Figure 7-57 and described in Table 7-37. Read-only Return to the Register Maps Table Figure 7-57. DIAG1 Register 7 6 5 4 3 2 1 0 OCP_LS2_B OCP_HS2_B OCP_LS1_B OCP_HS1_B OCP_LS2_A OCP_HS2_A OCP_LS1_A OCP_HS1_A R-0b R-0b R-0b R-0b R-0b R-0b R-0b R-0b Table 7-37. DIAG1 Register Field Descriptions Bit Field Type Default Description 7 OCP_LS2_B R 0b When this bit is 1b, it indicates overcurrent fault on the low-side FET of half bridge connected to BOUT2 6 OCP_HS2_B R 0b When this bit is 1b, it indicates overcurrent fault on the high-side FET of half bridge connected to BOUT2 5 OCP_LS1_B R 0b When this bit is 1b, it indicates overcurrent fault on the low-side FET of half bridge connected to BOUT1 4 OCP_HS1_B R 0b When this bit is 1b, it indicates overcurrent fault on the high-side FET of half bridge connected to BOUT1 3 OCP_LS2_A R 0b When this bit is 1b, it indicates overcurrent fault on the low-side FET of half bridge connected to AOUT2 2 OCP_HS2_A R 0b When this bit is 1b, it indicates overcurrent fault on the high-side FET of half bridge connected to AOUT2 1 OCP_LS1_A R 0b When this bit is 1b, it indicates overcurrent fault on the low-side FET of half bridge connected to AOUT1 0 OCP_HS1_A R 0b When this bit is 1b, it indicates overcurrent fault on the high-side FET of half bridge connected to AOUT1 7.5.1.3 DIAG2 (address = 0x02) [Default = 00h] DIAG2 is shown in Figure 7-58 and described in Table 7-38. Read-only Return to the Register Maps Table Figure 7-58. DIAG2 Register 7 6 5 4 3 2 1 0 STSL OTW OTS STL_LRN_OK STALL LRN_DONE OL_B OL_A R-0b R-0b R-0b R-0b R-0b R-0b R-0b R-0b Table 7-38. DIAG2 Register Field Descriptions Bit Field Type Default Description 7 STSL R 0b When this bit is 1b, it indicates that the device is operating with standstill power saving mode. 6 OTW R 0b When this bit is 1b, it indicates overtemperature warning. 5 OTS R 0b When this bit is 1b, it indicates overtemperature shutdown. 4 STL_LRN_OK R 0b When this bit is 1b, it indicates stall detection learning is successful. DRV8461 SLOSE98 – DECEMBER 2022 www.ti.com 74 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DRV8461 |
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