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DRV8461SPWPR 数据表(PDF) 83 Page - Texas Instruments |
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DRV8461SPWPR 数据表(HTML) 83 Page - Texas Instruments |
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83 / 117 page  Table 7-53. CTRL13 Control Register Field Descriptions Bit Field Type Default Description 7-2 TSTSL_DLY[5:0] R/W 000100b Controls the delay between last STEP pulse and activation of standstill power saving mode. • 000000b: Reserved • 000001b: Delay = 1 x 16 ms = 16 ms • ............ • 000100b: Delay = 4 x 16 ms = 64 ms • ............ • 111111b: Delay = 63 x 16 ms = 1.008 s 1 VREF_INT_EN R/W 0b When this bit is 1b, the device uses the internal 3.3 V reference for current regulation, and the voltage on the VREF pin is ignored. 0 RSVD R/W 0b Reserved Note Do not set TSTSL_DLY to 000000b. 7.5.2.14 CTRL14 (address = 0x3C) [Default = 58h] CTRL14 is shown in Figure 7-73 and described in Table 7-54. Read only Return to the Register Maps Table Figure 7-73. CTRL14 Control Register 7 6 5 4 3 2 1 0 VM_ADC[4:0] RSVD R-01011b R-000b Table 7-54. CTRL14 Control Register Field Descriptions Bit Field Type Default Description 7-3 VM_ADC[4:0] R 01011b Outputs the value of the supply voltage, monitored by an internal ADC. • 00000b: VVM = 0 V • ................................ • 01011b: VVM = 24 V • ................................. • 11111b: VVM = 65 V 2-0 RSVD R 000b Reserved 7.5.3 Indexer Registers The indexer registers provide current values for coil A, and the position in the microstep table for the currents in coil A and coil B. Indexer registers are read only. Table 7-55 lists the memory-mapped registers for the indexer registers. All register offset addresses not listed in Table 7-55 should be considered as reserved locations and the register contents should not be modified. Table 7-55. Indexer Registers Summary Table Address Register Name Section 0x11 INDEX1 Go www.ti.com DRV8461 SLOSE98 – DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 83 Product Folder Links: DRV8461 |
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