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DRV8461SPWPR 数据表(PDF) 16 Page - Texas Instruments |
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DRV8461SPWPR 数据表(HTML) 16 Page - Texas Instruments |
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16 / 117 page  7.2 Functional Block Diagram VCP CPH CPL VM VM 0.1 F Power Charge Pump DVDD Regulator DVDD 1 F STEP DIR ENABLE nSLEEP Control Inputs VREF Analog Input Smart tune Gate Drivers VM Current Sense VM Current Sense SINE DAC AOUT1 AOUT2 PGNDA VVREF Stepper Motor Fault Output nFAULT DVDD Protection Overcurrent PPAD GND Undervoltage Open Load Overtemperature RnFAULT Microstepping Indexer 1 µF VVREF BOUT1 BOUT2 PGNDB Gate Drivers VM Current Sense VM Current Sense SINE DAC VVREF K V + – K V + – 0.1 F VCC nHOME RnHOME MODE = 1 Indexer Position DVDD SDI SCLK SDO nSCS SPI VCC VREF RREF2 RREF1 VCC Silent step Decay Auto-torque Automatic Microstepping Customizable Microstepping Standstill Power Saving DIGITAL CORE Stall Detection VCC Figure 7-1. DRV8461 Block Diagram with SPI Interface DRV8461 SLOSE98 – DECEMBER 2022 www.ti.com 16 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DRV8461 |
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