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DRV8461SPWPR 数据表(PDF) 97 Page - Texas Instruments |
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DRV8461SPWPR 数据表(HTML) 97 Page - Texas Instruments |
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97 / 117 page  Table 7-91. SS_CTRL1 Register Field Descriptions Bit Field Type Default Description 7-6 SS_SMPL_SEL[1:0] R/W 00b Silent step current zero cross sampling time. Default value is 2 μs. If current waveform is distorted around zero crossing, increase the sampling time. • 00b = 2 μs (default) • 01b = 3 μs • 10b = 4 μs • 11b = 5 μs 5-4 RSVD R/W 00b Reserved. 3-2 SS_PWM_FREQ[1:0] R/W 00b Represents the PWM frequency (FPWM) in silent step decay mode. • 00b - 25KHz • 01b - 33KHz • 10b - 42KHz • 11b - 50KHz 1 RSVD R/W 0b Reserved 0 EN_SS R/W 0b 0b = silentstep decay mode is disabled 1b = silentstep decay mode is enabled 7.5.6.2 SS_CTRL2 (address = 0x32) [Default = 00h] SS_CTRL2 is shown in Figure 7-107 and described in Table 7-92. Read/Write Return to the Register Maps Table Figure 7-107. SS_CTRL2 Register 7 6 5 4 3 2 1 0 RSVD SS_KP[6:0] R/W - 0b R/W-0000000b Table 7-92. SS_CTRL2 Register Field Descriptions Bit Field Type Default Description 7 RSVD R/W 0b Reserved. 6-0 SS_KP[6:0] R/W 0000000b Represents the proportional gain of the silent step PI controller. Has a range of 0 to 127, with a default value of 0. 7.5.6.3 SS_CTRL3 (address = 0x33) [Default = 00h] SS_CTRL3 is shown in Figure 7-108 and described in Table 7-93. Read/Write Return to the Register Maps Table Figure 7-108. SS_CTRL3 Register 7 6 5 4 3 2 1 0 RSVD SS_KI[6:0] R/W-0b R/W-0000000b www.ti.com DRV8461 SLOSE98 – DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 97 Product Folder Links: DRV8461 |
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