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DRA821U4...ALM 数据表(PDF) 104 Page - Texas Instruments |
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DRA821U4...ALM 数据表(HTML) 104 Page - Texas Instruments |
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104 / 252 page  7.6.7 LVCMOS Electrical Characteristics Over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT BALL NAMES: ALL other IOs BALL NUMBERS: ALL other IOs 1.8-V MODE VIL Input Low Voltage 0.35 × VDD(1) V VILSS Input Low Voltage Steady State 0.3 × VDD(1) V VIH Input High Voltage 0.65 × VDD(1) V VIHSS Input High Voltage Steady State 0.85 × VDD(1) V VHYS Input Hysteresis Voltage 150 mV IIN Input Leakage Current. VI = 1.8 V or 0 V ±10 µA RPU Pull-up Resistor 15 22 30 kΩ RPD Pull-down Resistor 15 22 30 kΩ VOL Output Low Voltage 0.45 V VOH Output High Voltage VDD(1) - 0.45 V IOL Low Level Output Current VOL(MAX) 3 mA IOH High Level Output Current VOH(MIN) 3 mA 3.3-V MODE VIL Input Low Voltage 0.8 V VILSS Input Low Voltage Steady State 0.6 V VIH Input High Voltage 2.0 V VIHSS Input High Voltage Steady State 2.0 V VHYS Input Hysteresis Voltage 150 mV IIN Input Leakage Current. VI = 3.3 V or 0 V ±10 µA RPD Pull-down Resistor 15 22 30 kΩ VOL Output Low Voltage 0.4 V VOH Output High Voltage 2.4 V IOL Low Level Output Current VOL(MAX) 5 mA IOH High Level Output Current VOH(MIN) 6 mA (1) VDDSHV stands for corresponding power supply. For more information on the power supply name and the corresponding ball, see Table 6-1, POWER column. 7.6.8 USB2PHY Electrical Characteristics Note USB0 Electrical Characteristics are compliant with Universal Serial Bus Revision 2.0 Specification dated April 27, 2000 including ECNs and Errata as applicable. DRA821U-Q1 SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022 www.ti.com 104 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DRA821U-Q1 |
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