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DRA821U4...ALM 数据表(PDF) 106 Page - Texas Instruments |
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DRA821U4...ALM 数据表(HTML) 106 Page - Texas Instruments |
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106 / 252 page  7.6.10 DDR Electrical Characteristics Note The DDR interface is compatible with JEDEC JESD209-4B standards compliant LPDDR4 SDRAM devices. 7.7 VPP Specifications for One-Time Programmable (OTP) eFuses This section specifies the operating conditions required for programming the OTP eFuses and is applicable only for High-Security Devices. 7.7.1 Recommended Operating Conditions for OTP eFuse Programming over operating free-air temperature range (unless otherwise noted) PARAMETER DESCRIPTION MIN NOM MAX UNIT VDD_CORE Supply voltage range for the core domain during OTP operation; OPP NOM (BOOT) See Section 7.3 V VDD_MCU Supply voltage range for the core domain during OTP operation; OPP NOM (BOOT) See Section 7.3 V VPP_CORE Supply voltage range for the eFuse ROM domain during normal operation N/A Supply voltage range for the eFuse ROM domain during OTP programming (1) 1.71 1.8 1.89 V VPP_MCU Supply voltage range for the eFuse ROM domain during normal operation N/A Supply voltage range for the eFuse ROM domain during OTP programming (1) 1.71 1.8 1.89 V SR(VPP) VPP Slew Rate 6E + 4 V/s (1) Supply voltage range includes DC errors and peak-to-peak noise. TI power management solutions TLV70718 from the TLV707x family is a example device that meets the supply voltage range needed for VPP_CORE and VPP_MCU. 7.7.2 Hardware Requirements The following hardware requirements must be met when programming keys in the OTP eFuses: • The VPP_CORE and VPP_MCU power supplies must be disabled when not programming OTP registers. • The VPP_CORE and VPP_MCU power supplies must be ramped up after the proper device power-up sequence (for more details, see Section 7.9.2). 7.7.3 Programming Sequence Programming sequence for OTP eFuses: • Power on the board per the power-up sequencing. No voltage should be applied on the VPP_CORE and VPP_MCU terminals during power up and normal operation. • Load the OTP write software required to program the eFuse (contact your local TI representative for the OTP software package). • Apply the voltage on the VPP_CORE and VPP_MCU terminals according to the specification in Section 7.7.1. • Run the software that programs the OTP registers. • After validating the content of the OTP registers, remove the voltage from the VPP_CORE and VPP_MCU terminals. 7.7.4 Impact to Your Hardware Warranty You recognize and accept at your own risk that your use of eFuse permanently alters the TI device. You acknowledge that eFuse can fail due to incorrect operating conditions or programming sequence. Such a failure may render the TI device inoperable and TI will be unable to confirm the TI device conformed to TI device specifications prior to the attempted eFuse. CONSEQUENTLY, TI WILL HAVE NO LIABILITY FOR ANY TI DEVICES THAT HAVE BEEN eFUSED. DRA821U-Q1 SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022 www.ti.com 106 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DRA821U-Q1 |
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