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DRA821U4...ALM 数据表(PDF) 198 Page - Texas Instruments |
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DRA821U4...ALM 数据表(HTML) 198 Page - Texas Instruments |
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198 / 252 page  7.9.5.16.1 MMCSD0 - eMMC Interface MMCSD0 interface is compliant with the JEDEC eMMC electrical standard v5.1 (JESD84-B51) and it supports the following eMMC applications: • Default speed • High speed SDR • High speed DDR • High speed HS200 • High speed HS400 Table 7-53 presents the required DLL software configuration settings for MMC0 timing modes. Table 7-53. MMC0 DLL Delay Mapping for All Timing Modes REGISTER NAME MMCSD0_SS_PHY_CTRL_4_REG MMCSD0_SS_PHY_CTRL_5_REG BIT FIELD [31:24] [20] [15:12] [8] [4:0] [17:16] [10:8] [2:0] BIT FIELD NAME STRBSEL OTAPDLYENA OTAPDLYSEL ITAPDLYENA ITAPDLYSEL SELDLYTXCLK SELDLYRXCLK FRQSEL CLKBUFSEL MODE DESCRIPTION STROBE DELAY OUTPUT DELAY ENABLE OUTPUT DELAY VALUE INPUT DELAY ENABLE INPUT DELAY VALUE DLL/ DELAY CHAIN SELECT DLL REF FREQUENCY DELAY BUFFER DURATION Legacy SDR 8-bit PHY operating 1.8 V, 25 MHz 0x0 0x0 NA 0x1 0x10 0x1 0x0 0x7 High Speed SDR 8-bit PHY operating 1.8 V, 50 MHz 0x0 0x0 NA 0x1 0xA 0x1 0x0 0x7 High Speed DDR 8-bit PHY operating 1.8 V, 50 MHz 0x0 0x1 0x6 0x1 0x3 0x0 0x4 0x7 HS200 8-bit PHY operating 1.8 V, 200 MHz 0x0 0x1 0x8 0x1 Tuning 0x0 0x0 0x7 HS400 8-bit PHY operating 1.8 V, 200 MHz 0x77 0x1 0x5 0x1 Tuning 0x0 0x0 0x7 Table 7-54 represents MMCSD0 timing conditions. Table 7-54. MMCSD0 Timing Conditions PARAMETER MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate Legacy SDR 0.05 1.24 V/ns High Speed SDR 0.3 1.65 V/ns High Speed DDR (CMD) [DDR52] 0.3 1.65 V/ns High Speed DDR (DAT[7:0]) [DDR52] 0.3 1.65 V/ns OUTPUT CONDITIONS CL Output load capacitance Legacy SDR 1 18 pF High Speed SDR 1 18 pF High Speed DDR 1 18 pF HS200 1 12 pF HS400 1 6 pF PCB CONNECTIVITY REQUIREMENTS td(Trace Delay) Propagation delay of each trace All modes 134 756 ps td(Trace Mismatch Delay) Propagation delay mismatch across all traces Legacy SDR, High Speed SDR 100 ps High Speed DDR, HS200, HS400 8 ps DRA821U-Q1 SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022 www.ti.com 198 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DRA821U-Q1 |
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