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ZUSBOPTSC01ZACG 数据表(PDF) 107 Page - Zilog, Inc. |
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ZUSBOPTSC01ZACG 数据表(HTML) 107 Page - Zilog, Inc. |
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107 / 282 page ![]() PS022827-1212 P R E L I M I N A R Y Timer Control Register Definitions Z8 Encore! XP® F082A Series Product Specification 90 Table 52. Timer 0–1 High Byte Register (TxH) Bit 7 6 5 4 3 2 1 0 Field TH RESET 00000000 R/W R/WR/W R/WR/WR/WR/WR/WR/W Address F00H, F08H Table 53. Timer 0–1 Low Byte Register (TxL) Bit 7 6 5 4 3 2 1 0 Field TL RESET 00000001 R/W R/WR/W R/WR/WR/WR/WR/WR/W Address F01H, F09H Bit Description [7:0] TH, TL Timer High and Low Bytes These 2 bytes, {TH[7:0], TL[7:0]}, contain the current 16-bit timer count value. |
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