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ZUSBOPTSC01ZACG 数据表(PDF) 116 Page - Zilog, Inc. |
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ZUSBOPTSC01ZACG 数据表(HTML) 116 Page - Zilog, Inc. |
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116 / 282 page ![]() PS022827-1212 P R E L I M I N A R Y Universal Asynchronous Receiver/ Z8 Encore! XP® F082A Series Product Specification 99 Universal Asynchronous Receiver/ Transmitter The universal asynchronous receiver/transmitter (UART) is a full-duplex communication channel capable of handling asynchronous data transfers. The UART uses a single 8-bit data mode with selectable parity. Features of the UART include: • 8-bit asynchronous data transfer • Selectable even- and odd-parity generation and checking • Option of one or two STOP bits • Separate transmit and receive interrupts • Framing, parity, overrun and break detection • Separate transmit and receive enables • 16-bit baud rate generator (BRG) • Selectable MULTIPROCESSOR (9-bit) Mode with three configurable interrupt schemes • Baud rate generator (BRG) can be configured and used as a basic 16-bit timer • Driver enable (DE) output for external bus transceivers Architecture The UART consists of three primary functional blocks: transmitter, receiver and baud rate generator. The UART’s transmitter and receiver function independently, but employ the same baud rate and data format. Figure 10 displays the UART architecture. |
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