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ZUSBOPTSC01ZACG 数据表(PDF) 113 Page - Zilog, Inc.

部件名 ZUSBOPTSC01ZACG
功能描述  High-Performance 8-Bit Microcontrollers
PDF  282 Pages
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制造商  ZILOG [Zilog, Inc.]
网页  http://www.zilog.com
标志 ZILOG - Zilog, Inc.

ZUSBOPTSC01ZACG 数据表(HTML) 113 Page - Zilog, Inc.

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PS022827-1212
P R E L I M I N A R Y
Watchdog Timer Control Register
Z8 Encore! XP® F082A Series
Product Specification
96
into the Watchdog Timer Reload registers results in a one-second time-out at room tem-
perature and 3.3V supply voltage. Time-outs other than one second may be obtained by
scaling the calibration values up or down as required.
The Watchdog Timer accuracy still degrades as temperature and supply voltage vary. See
Table 137 on page 235 for details.
Watchdog Timer Control Register Definitions
This section defines the features of the following Watchdog Timer Control registers.
Watchdog Timer Control Register (WDTCTL): see page 96
Watchdog Timer Reload Upper Byte Register (WDTU): see page 97
Watchdog Timer Reload High Byte Register (WDTH): see page 97
Watchdog Timer Reload Low Byte Register (WDTL): see page 98
Watchdog Timer Control Register
The Watchdog Timer Control (WDTCTL) Register is a write-only control register. Writ-
ing the 55H, AAH unlock sequence to the WDTCTL Register address unlocks the three
Watchdog Timer Reload Byte registers (WDTU, WDTH and WDTL) to allow changes to
the time-out period. These write operations to the WDTCTL Register address produce no
effect on the bits in the WDTCTL Register. The locking mechanism prevents spurious
writes to the reload registers. This register address is shared with the read-only Reset Sta-
tus Register.
Table 59. Watchdog Timer Control Register (WDTCTL)
Bit
7
6
5
4
3
2
1
0
Field
WDTUNLK
RESET
XXXXXXXX
R/W
WWWWWWWW
Address
FF0H
Note: X = Undefined.
Bit
Description
[7:0]
WDTUNLK
Watchdog Timer Unlock
The software must write the correct unlocking sequence to this register before it is allowed
to modify the contents of the Watchdog Timer reload registers.
Note:



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