STR720 datasheet(212/401 Pages) STMICROELECTRONICS

部件名	STR720

功能描述	ARM720T 16/32-BIT MCU WITH 16K RAM, USB, CAN, 3 TIMERS, ADC, 6 COMMUNICATIONS INTERFACES

PDF	401 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

212 / 401 page

STR720 - CONTROLLER AREA NETWORK (CAN)

212/401

Note

The busoff recovery sequence (see CAN Specification Rev. 2.0) cannot be

shortened by setting or resetting the Init bit. If the device goes in the busoff state, it

will set Init of its own accord, stopping all bus activities. Once Init has been cleared

by the CPU, the device will then wait for 129 occurrences of Bus Idle (129 * 11

consecutive recessive bits) before resuming normal operations. At the end of the

busoff recovery sequence, the Error Management Counters will be reset.

During the waiting time after resetting Init, each time a sequence of 11 recessive bits has

been monitored, a Bit0Error code is written to the Status Register, enabling the CPU to readily

check up whether the CAN bus is stuck at dominant or continuously disturbed and to monitor

the proceeding of the busoff recovery sequence.

Bit 1

IE: Module Interrupt Enable

0: Disabled.

1: Enabled.

Bit 0

Init Initialization

0: Normal Operation.

1: Initialization is started.

STR720 数据表(PDF) 212 Page - STMicroelectronics