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STR720 数据表(PDF) 278 Page - STMicroelectronics

部件名 STR720
功能描述  ARM720T 16/32-BIT MCU WITH 16K RAM, USB, CAN, 3 TIMERS, ADC, 6 COMMUNICATIONS INTERFACES
PDF  401 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STR720 数据表(HTML) 278 Page - STMicroelectronics

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STR720 - USB SLAVE INTERFACE (USB)
278/401
event is an USB reset sequence (See “Universal Serial Bus Specification” for more details).
The start of a resume or reset sequence, while the USB Peripheral is suspended, clears the
LP_MODE bit in USB_CNTR register
asynchronously. Even if this event can trigger an
WKUP interrupt if enabled, the use of an interrupt response routine must be carefully
evaluated because of the long latency due to system clock restart; to have the shorter latency
before re-activating the nominal clock it is suggested to put the resume procedure just after
the end of the suspend one, so its code is immediately executed as soon as the system clock
restarts. To prevent ESD discharges or any other kind of noise from waking-up the system
(the exit from suspend mode is an asynchronous event), a suitable analog filter on data line
status is activated during suspend; the filter width is about 70nS.
The following is a list of actions a resume procedure should address:
1. Optionally turn on external oscillator and device PLL.
2. Clear FSUSP bit of USB_CNTR register.
3. If the resume triggering event has to be identified, bits RXDP and RXDM in the USB_FNR
register can be used according to Table 61, which also lists the intended software action
in all the cases. If required, the end of resume or reset sequence can be detected moni-
toring the status of the above mentioned bits by checking when they reach the “10” config-
uration, which represent the Idle bus state; moreover at the end of a reset sequence the
RESET bit in USB_ISTR register is set to 1, issuing an interrupt if enabled, which should
be handled as usual.
A device may require to exit from suspend mode as an answer to particular events not directly
related to the USB protocol (e.g. a mouse movement wakes up the whole system). In this
case, the resume sequence can be started by setting the RESUME bit in the USB_CNTR
register to ‘1’ and resetting it to 0 after an interval between 1mS and 15mS (this interval can
be timed using ESOF interrupts, occurring with a 1mS period when the system clock is
running at nominal frequency). Once the RESUME bit is clear, the resume sequence will be
completed by the host PC and its end can be monitored again using the RXDP and RXDM
bits in the USB_FNR register.
Note
The RESUME bit must be anyway used only after the USB Peripheral has been put
in suspend mode, setting the FSUSP bit in USB_CNTR register to 1.
Table 61. Resume Event Detection
[RXDP,RXDM]
Status
Wake-up event
Required resume software action
“00”
Root reset
None
“10”
None
(noise on bus)
Go back in Suspend mode
“01”
Root resume
None
“11”
Not Allowed
(noise on bus)
Go back in Suspend mode
1



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