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STR720 数据表(PDF) 280 Page - STMicroelectronics

部件名 STR720
功能描述  ARM720T 16/32-BIT MCU WITH 16K RAM, USB, CAN, 3 TIMERS, ADC, 6 COMMUNICATIONS INTERFACES
PDF  401 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STR720 数据表(HTML) 280 Page - STMicroelectronics

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STR720 - USB SLAVE INTERFACE (USB)
280/401
19.6.1
Common Registers
These registers affect the general behaviour of the USB Peripheral defining operating mode,
interrupt handling, device address and giving access to the current frame number updated by
the host PC.
USB Control Register (USB_CNTR)
Address Offset: 40h
Reset Value: 0000 0000 0000 0011 (0003h)
15
14
13
12
11
10
98
76
54
32
10
Reserved
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Bit 15
CTRM: Correct Transfer Interrupt Mask
0: Correct Transfer (CTR) Interrupt disabled.
1: CTR Interrupt enabled, an interrupt request is generated when the
corresponding bit in the USB_ISTR register is set.
Bit 14
DOVRM: DMA over / underrun Interrupt Mask
0: DOVR Interrupt disabled.
1: DOVR Interrupt enabled, an interrupt request is generated when the
corresponding bit in the USB_ISTR register is set.
Bit 13
ERRM: Error Interrupt Mask
0: ERR Interrupt disabled.
1: ERR Interrupt enabled, an interrupt request is generated when the
corresponding bit in the USB_ISTR register is set.
Bit 12
WKUPM: Wake-up Interrupt Mask
0: WKUP Interrupt disabled.
1: WKUP Interrupt enabled, an interrupt request is generated when the
corresponding bit in the USB_ISTR register is set.
Bit 11
SUSPM: Suspend mode Interrupt Mask
0: Suspend Mode Request (SUSP) Interrupt disabled.
1: SUSP Interrupt enabled, an interrupt request is generated when the
corresponding bit in the USB_ISTR register is set.
1



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