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STR720 数据表(PDF) 328 Page - STMicroelectronics |
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STR720 数据表(HTML) 328 Page - STMicroelectronics |
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328 / 401 page ![]() STR720 - EXTENDED FUNCTION TIMER (EFT) 328/401 Bit 7= OCBE: Output Compare B Enable 0: Output Compare B function is enabled, but the OCMPB pin is a general I/O. 1: Output Compare B function is enabled, the OCMPB pin is dedicated to the Output Compare B capability of the timer. Bit 6= OCAE: Output Compare A Enable 0: Output Compare A function is enabled, but the OCMPA pin is a general I/O. 1: Output Compare A function is enabled, the OCMPA pin is dedicated to the Output Compare A capability of the timer. Bit 5 = OPM: One Pulse Mode 0: One Pulse Mode is not active. 1: One Pulse Mode is active, the ICAPA pin can be used to trigger one pulse on the OCMPA pin; the active transition is given by the IEDGA bit. The length of the generated pulse depends on the contents of the OCAR register. Bit 4 = PWM: Pulse Width Modulation 0: PWM mode is not active. 1: PWM mode is active, the OCMPA pin outputs a programmable cyclic signal; the length of the pulse depends on the value of OCAR register; the period depends on the value of OCBR register. Bit 3 = IEDGB: Input Edge B This bit determines which type of level transition on the ICAPB pin will trigger the capture. 0: A falling edge triggers the capture. 1: A rising edge triggers the capture. Bit 2 = IEDGA: Input Edge A This bit determines which type of level transition on the ICAPA pin will trigger the capture. 0: A falling edge triggers the capture. 1: A rising edge triggers the capture. Bit 1 = EXEDG: External Clock Edge This bit determines which type of level transition on the external clock pin (or internal signal) EXTCLK will trigger the counter. 0: A falling edge triggers the counter. 1: A rising edge triggers the counter. Bit 0 = ECKEN: External Clock Enable 0: Internal clock, divided by prescaler division factor, is used to feed timer clock. 1: External source is used for timer clock. 1 |
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