STR720 datasheet(335/401 Pages) STMICROELECTRONICS

335 / 401 page

STR720 - S-D ANALOG/DIGITAL CONVERTER (ADC)

335/401

22.3.7

The Sinc3 Decimation Filter

The single-bit bitstream in output from the

Σ−∆ modulator is fed to a Sinc3 digital filter which

filters the modulator bitstream output and decimates the sample rate to Fs. The Sinc

Z-domain transfer function

is:

with N = 171 in the case of STR720 device.

can be also conveniently represented as

the product of three functions of the kind:

where

{n=0,1, 2} is given by:

is therefore the product of three low-pass filters

of 171 taps each and with

zeros evenly spread from 0 to F

Mod (modulator sampling frequency) in the

frequency domain. Since, in the discrete time domain, the impulse response

inverse

z-transform of

is given by the convolution:

the total number of taps of

The normal implementation of this filter is shown below in Figure 3. The transfer function is

decomposed into IIR and FIR sections — the IIR section (consisting of 3 integrators) runs at

the full oversampling clock rate while the FIR section (with 3 differentiators) runs at the

decimated rate.

Figure 58. Sinc3 Digital Filter

()

------

–

-----------------

()

n z

()

n z

()

----

–

-----------------

----

–

… z

–

()

–

()

–

∑

()

n z

()

171

()

⊗⊗

()

–

511

/171

i/p

o/p

z 1

–

-----------------

z N

–

Single Bit

16 Bit

z 1

–

-----------------

z 1

–

-----------------

z N

–

z N

–

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