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STR720 数据表(PDF) 343 Page - STMicroelectronics |
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STR720 数据表(HTML) 343 Page - STMicroelectronics |
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343 / 401 page ![]() STR720 - GENERAL PURPOSE I/O PORTS 343/401 23 GENERAL PURPOSE I/O PORTS 23.1 Introduction The General Purpose IO Port are programmable by software in several conditions: input, output, Alternate Function, open drain, push-pull, weak push-pull and high impedance. Each Port is configured in Input (PC0=0, PC1=1, PC2=0, see Table 72 on page 344) during the Reset phase. Warning: being each GPIO pin configured in Input during Reset phase, the IO pins are released to High Impedance condition. To avoid power consumption the user has to drive the IOs to stable levels. 23.2 Main Features ■ Data Input /Output ■ Alternate Function ■ CMOS Input ■ PUSH-PULL Output ■ Open Drain Output ■ Weak PUSH-PULL Output ■ Full software programmability 23.3 Functional Description The General Purpose IO Port has three configuration registers (PC0,PC1,PC2) and one IO Data register (PD). All the allowed Port configurations, set by programming of the configuration registers are summarized in Table 72 on page 344, where the index (n) is a generic IO bit. A writing access to the IO Data register always loads the data in the Output Latch.The Output Latch holds the data to be sent out while the Input Latch captures the data present on the IO pin. A reading access to the IO Data register can read the Input Latch or the Output Latch according to the Port configuration (see later). |
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