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DRA821U4...ALM 数据表(PDF) 158 Page - Texas Instruments |
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DRA821U4...ALM 数据表(HTML) 158 Page - Texas Instruments |
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158 / 252 page ![]() NO. PARAMETER DESCRIPTION MIN MAX UNIT PWM5 tw(SOC) Pulse duration, SOC output (asynchronous) P -3 (1) ns (1) P = sysclk period in ns EHRPWM_SOCA/B PWM5 EPERIPHERALS_TIMNG_04 EHRPWM_SYNCO PWM2 EHRPWM_A/B PWM1 PWM1 Figure 7-52. EPWM_A/B_out, ePWM_SYNCO, and ePWM_SOCA/B Input Timings EHRPWM_A/B EHRPWM_TZn_IN EPERIPHERALS_TIMING_05 PWM3 Figure 7-53. EPWM_A/B and ePWM_TZn_IN Forced High/Low Input Timings EHRPWM_A/B EHRPWM_TZn_IN PWM4 Figure 7-54. EPWM_A/B and ePWM_TZn_IN Hi–Z Input Timings 7.9.5.6.2 Switching Characteristics for EPWM NO. PARAMETER DESCRIPTION MIN MAX UNIT PWM6 tw(SYNCIN) Pulse duration, Sync input (asynchronous) 2 + 2P (1) ns DRA821U-Q1 SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022 www.ti.com 158 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DRA821U-Q1 |
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